Standard SPI full-duplex or Quad SPI / 4-Bit half-duplex master mode
16-Word / 64 Byte deep FIFO for receive and transmit data Max. 50 MHz clock rate IRQ based FIFO interaction / DMA interface for receive and transmit data
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IO-Link Controller
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IO-Link V1.1 with 8 channels
Supports 4.800, 38.400 and 230.400 Baud with IO-Link transceiver like L6360 Lower IO-Link layer runs on xPIC HAL with C-function interface to the IO-Link protocol stack
