With the release of netX Studio CDT V1.0700.1.3056, Hilscher introduced the AIFXv2 mode that enables users to create one hardware configuration (HWC) file for real-time Ethernet and Fieldbus loadable firmware (LFW) versions. As illustrated in Figure 1, instead of creating a HWC file with either a real-time Ethernet or Fieldbus network interface, the AIFXv2 mode enables both pinout options selectable by using specific configuration input pins as summarized in Table 1.

Figure 1: Hardware configuration tool netX Studio CDT

A communication firmware (see section 2.2 netX 90 – use cases) consists of a flash device label (FDL), hardware configuration (HWC), loadable firmware (LFW), and maintenance firmware (MFW). The LFW (see section 5 Firmware overview and resources) by definition is device, hardware, and application independent.

The selection of the network interface in the AIFXv2 mode is determined by the voltage level at the configuration input pins XM0_IO1, COM_IO1 and COM_IO0 during the boot sequence of the chip. The pull-down resistor of each configuration input pin is enabled by default after reset. If the pins are left unconnected, the default mode is real-time Ethernet.

XM0_IO1	COM_IO1	COM_IO0	Network Interface
0	X	X	PHY0/1 Real-time Ethernet (see section 3.17.1 Twisted pair)
1	0	0	XM0 CANopen (see section 3.16.1 CANopen interface)
1	0	1	XM0 PROFIBUS (see section 3.16.4 PROFIBUS interface)
1	1	0	XM0 DeviceNet (see section 3.16.3 DeviceNet interface)
1	1	1	XM0 CC-Link (see section 3.16.2 CC-Link interface)

Table 1: AIFXv2 mode configuration input pins

Please note that the AIFXv2 mode is passed on from the HWC to the LFW in order to verify whether the selected network interface and programmed LFW version do match.

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