External DPM InterruptsnetX 90 features 2 external interrupt signals for all DPM channels: Signals DIRQ and SIRQ. Since SIRQ is unused in current Hilscher LFWs, there is actually only 1 interrrupt signal related to the DPM activity DPM_DIRQ / SPI_DIRQ signalThe DIRQ signal (depending on the used host interface parallel or serial) is triggered and reset automatically by DPM access netX Firmware writes handshake flags: DIRQ activated
Host read handshake flags: DIRQ deactivated The polarity of the DIRQ signal (high/low active) can be configured in the DPM hardware configuration. DPM_SIRQ / SPI_SIRQ signalcurrently not used by Hilscher LFWs (loadable firmwares)
Internal DPM InterruptsThe granularity of interrupts for the internal DPM is higher than for the external DPM. Each handshake register, i.e. each DPM channel, features its own interrupt. netx90_app.h | IRQ | Name | DPM channel mapping |
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| | 32 | hsc0_IRQn | handshake cell 0 | System Channel | | 33 | hsc1_IRQn | handshake cell 1 | Sync-Hanshake Flags | | 34 | hsc2_IRQn | handshake cell 2 | Communication Channel 0 | | 35 | hsc3_IRQn | handshake cell 3 | Communication Channel 1 | | 36 | hsc4_IRQn | handshake cell 4 | Communication Channel 2 | | 37 | hsc5_IRQn | handshake cell 5 |
| | 38 | hsc6_IRQn | handshake cell 6 |
| | 39 | hsc7_IRQn | handshake cell 7 |
| | 40 | hsc8to15_IRQn | handshake cell 8..15 |
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/***********************************************************************
* IRQ 33 hsc1_IRQn handshake cell 1 Sync-Hanshake Flags
* refer to "Dual-Port Memory Interface Manual"
* chapter "3.4 Synchronization - Handshake Register and Flags"
***********************************************************************/
void HSC1_IRQHandler(void)
{
uint8_t HSYNCF_CH0 = 0;
uint8_t NSYNCF_CH0 = 0;
NETX_HANDSHAKE_CELL ulSYNCHSValue = ((MINIMAL_DPM_T volatile * const ) (0xb0000000))->tHandShakeChannel.tHskFlags; /*SYNC Handshake Flags*/
HSYNCF_CH0 = (ulSYNCHSValue.t16Bit.usHostFlags & 0x0001);
NSYNCF_CH0 = (ulSYNCHSValue.t16Bit.usNetxFlags & 0x0001);
if(HSYNCF_CH0 != NSYNCF_CH0){
/* sync event in channel 0 did occur */
/* do something synchronous*/
/* acknowledge the sync event: set HSYNCF_CH0 = NSYNCF_CH0 (i.e. toggle HSYNCF_CH0 bit)*/
ulSYNCHSValue.t16Bit.usHostFlags=(ulSYNCHSValue.t16Bit.usHostFlags & 0xFFFE) | NSYNCF_CH0;
}
DRV_NVIC_ClearPendingIRQ(hsc1_IRQn);
}
/***********************************************************************
* IRQ 34 hsc2_IRQn handshake cell 2 Communication Channel 0
* refer to "Dual-Port Memory Interface Manual"
* chapter "3.3 Communication Channel - Handshake Register and Flags"
***********************************************************************/
void HSC2_IRQHandler(void)
{
uint8_t HOST_RECV_MBX_ACK = 0;
uint8_t NETX_RECV_MBX_CMD = 0;
NETX_HANDSHAKE_CELL ulCOM0HSValue = ((MINIMAL_DPM_T volatile * const ) (0xb0000000))->tHandShakeChannel.tCommFlags0;
HOST_RECV_MBX_ACK = (ulCOM0HSValue.t16Bit.usHostFlags & 0x0020)>>5;
NETX_RECV_MBX_CMD = (ulCOM0HSValue.t16Bit.usNetxFlags & 0x0020)>>5;
if(NETX_RECV_MBX_CMD != HOST_RECV_MBX_ACK){
/*mailbox packet received*/
UNUSED(NETX_RECV_MBX_CMD);
UNUSED(HOST_RECV_MBX_ACK);
/*
* just for testpurposes!
* don't handle or acknowledge the receive mailbox here
* the receive mailbox is handled in the Protocol_PacketHandler()
* function in the mainloop
* */
}
DRV_NVIC_ClearPendingIRQ(hsc2_IRQn);
}
int main()
{
DRV_NVIC_EnableIRQ(hsc1_IRQn);
DRV_NVIC_EnableIRQ(hsc2_IRQn);
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