netX 90

• netX 90 & netRAPID 90 - What to Read?
• Application netX 90
• Errata netX 90
• PCN netX 90
  • PCN 200230
  • PCN 220093
  • PCN 220275
  • PCN 220276
  • PCN 230133
• Revision netX 90
• netX 90 FAQ
  • Development Tools / Debugging
    • netX USB drivers
    • Failed to start OpenOCD
    • How to install development tools on a restricted network
    • Install Doxygen and Graphvis manually
    • Interface for printf Debug Output or a terminal on netX 90 APP side
    • JTAG connectors and signals
    • JTAG Debug Probes for netX 90
      • SEGGER Debug Probes
      • Lauterbach Debug Probes
    • netX 90 ROM-code Startup Debugging
    • Optimization and Debug Levels
    • WAF - Pre/Post Processing
    • How to build an application firmware extension (NAE file)?
    • How to install new overlay files
    • Purpose of the AIFXv2 mode
    • Flash Dump and File Analysis Tool
    • How to build an application firmware(NAI) with Hilscher file header?
    • Memory Usage
    • How do I activate the Floating-Point Unit (FPU)?
    • Semihosting with OpenOCD
    • RST_OUT_N for fieldbus interfaces
    • Running waf build under Linux
    • "Resource does not exist" problem, when trying to start debugging the application firmware in netX Studio CDT.
    • Note: Offset of packed bit-field has changed in GCC 4.4
    • How to debug netX 90 application side with J-Link debug probe from SEGGER?
  • Production, Configuration, Update
    • MAC Address Generation in Console Mode
    • netX 90 hardware configuration: companion chip or stand alone chip?
    • How to programm firmware via webserver in console mode?
    • How to config netX90 protocol stack with database instead of packet commands?
    • MAC Adresses for Loadable Firmware Protocol Stacks
    • FIT - Failure in Time
    • Packing Information
    • How to start netX 90 MFW (Alternative Boot Mode) via packet command?
    • MFW(Maintenance Firmware) V1.2 or higher version failed to update NAI file, what could be the problem?
    • Firmware validation for LFW(Protocol stacks) and APP-FW --Troubleshooting guide when MFW fails to start the updated firmware
    • Tape and Reel, Pick & Place Shipping
    • Firmware update
    • Q&A J-STD-020E/033D
    • netX 90 flasher command line interface (Flasher CLI)
    • How to enter netX 90 Console Mode via packet command?
    • FDL - Flash Device Label
  • Miscellaneous
    • [English] Used Support Contingent
    • [Deutsch] Used Support Contingent
    • Dual-use export control for netX 90 and embedded devices / products with netX 90
  • Chip and Hardware
    • 1.2V Core Voltage Supply
    • AppNote POR / BOD
    • BOD - Brown Out Detection
    • Boundary Scan (BSDL) Files
    • Ethernet Circuit
    • IBIS Model
    • IO Library / Pad Cell
    • Landpattern/Footprint netX 90
    • netX 90 chip and evaluation board revisions
    • Pin sharing option for 10SPE
    • SDRAM Custom configuration
    • Significant parameters that determine the maximum SQI XIP mode frequency
    • SPM/DPM data transfer rates
    • STM32 FMC - netx 90 DPM interface
    • UTE - Temperature sensor
      • Trimmed ADC_VREF
  • netRAPID H90
    • NRPEB H90-RE or Hilscher NRPEB-SPM(IF0/IF1)
    • Restart ODM service if Device Explorer can't find NRP H90-RE
    • Getting started with netRAPID 90 (Companion Solution - Preloaded communication module)
    • How to start NRP H90 development with netX 90 development board?
    • CAD Product Model Data - STEP and PADS
  • APP-side Programming, Peripherals
    • Can you provide internal flasher sample code?
    • CMSIS Framework for netX 90
    • DPM Interrupts
    • Fault Exceptions
    • Hardware Watchdog
    • How to configure Input Capture
    • I2C Bus
    • Mutex DRV_LOCKED
    • netX 90 APP side Flash Memory programming
    • netX 90 peripheral drivers, driver examples, and protocol examples links
    • NVIC Interrupt Priority Grouping
    • Programming Guide
    • Reentrancy and Thread Safety
    • RTOS on netX 90
    • Software Reset
    • SQI Byte/Bit Order
    • Stack and Heap
    • Synchronization Interrupt Signals (IRT, DC Sync)
    • Using 3 UART interfaces
    • Using MMIO8 .. MMIO17
  • Loadable Firmware (LFW) - Protocol Stacks
    • Does netX 90 LFW Marshaller support Ethernet communication.
    • DPM - Dual Port Memory - Channel Watchdog
    • EtherCAT - Cycle Synchronous Process Data Reception - Interrupt Handled
    • Firmware device class for use case A/B and C
    • Firmware Variants
    • PROFINET FSU (Fast Startup) und EtherNetIP QuickConnect
    • Real-time Ethernet protocol status LEDs
    • Standalone Socket Interface usage
    • Using a webserver or TCP/IP UDP based service on the Host Application side
    • Use Case C - Extended Webserver - getting started
    • Host Application Examples - Structure
    • Mandatory Communication LEDs for certification
    • Functional safety with netX
    • Example for Packet Dump
    • Firmware Identification
    • Integrated Hilscher webserver of netX90 LFWs
    • Possible problems after updating firmware or maintenance firmware
    • Using the DDP service to set the MAC address
    • Firmware Filename Definition
• Video Tutorials netX 90
  • Introduction - netX 90
  • netX 90 Chip use cases: Companion/Single Chip
  • Evaluation Board - netX 90
  • Ecosystem - netX 90
  • Flash Memory Layout - netX 90
  • Host Interface: Dual Port Memory Hardware View - netX 90
  • Dual Port Memory Logical View - netX 90
  • Software Architecture LFW - netX 90
  • Flashing and Attaching - netX Studio
  • Template Project - netX Studio
  • Knowledge Base - netX 90
  • Startup Process - netX 90
  • Hardware Configuration Editor Part I - netX Studio
  • Hardware Configuration Editor Part II - netX Studio
  • CMSIS component - netX Studio
• Supported hardware components netX 90
  • PCN170114
• netX 90 Workshop Training
• Downloads netX 90
• Tools netX 90

The netX 90 is a highly integrated Industrial Ethernet node in a 10x10 mm², 144-pin BGA footprint with two Cortex-M4, on-chip Flash, Ethernet PHYs, DC/DC converter and POR circuit, which reduce the BOM costs for the hardware interface to a few passive components.

One of the highlights of the chip’s internal architecture is the logical separation of the communication tasks and the application tasks, both from software quality and security aspects. The partitioning restricts the software access to on-chip peripherals on either side. For the communication, Hilscher provides a scalable software solution in terms of protocol functionality and flexibility. The application makes full use of a separate Cortex-M4 at 100 MHz with DSP and FPU support, enhanced by a feature-rich set of on-chip peripherals with connectivity.

The SoC features two flexible communication (xC) IPs, which support all popular Industrial Ethernet standards, i.e. hard real-time. Most importantly, the xC architecture flexibly adapts by software to emerging standards and future network requirements such as TSN. Built-in security features enable developers to apply a secure by design concept by building layers of security as outlined in the IEC 62443, coupled with built-in diagnostics to monitor operating conditions for IIoT-enabled cloud services, e.g. predictive maintenance.

Hilscher delivers the range of software protocol stacks for communication tasks as prebuilt firmware, i.e. pre-certified. The data exchange with the protocol stack interface using the dual-ported memory (DPM) enables application developers to quickly set up a network prototype. The netX Studio from Hilscher includes all components required to configure, develop, and debug embedded applications. The compartmentalized project manager features a set of utility tools to set up the protocol stack in three user-friendly steps.

If you want to learn how the netX 90 with its ecosystem delivers the breadth of technology for your IIoT application of tomorrow, please contact us.