Revision netX 90

Product Revision

Maskset Type

Version Register1)

Mass Production

ROM Code Revision

Ethernet PHY Revision2)

Date Code YYWW3)Lot Trace Code LL3)

netX 90 Rev.0

Single Layer Mask (SLM)

0x0900000d

No

0x0

0x2

1830 ≤ YYWW < 1910LL = 1

netX 90 Rev.1

Revised Tape Out (RTO)

0x0900010d

Yes

0x1

0x2

1910 ≤ YYWW < 21112 ≤ LL ≤ 7

0x3 (PCN 200230)

2111 ≤ YYWW 2229

8 ≤ LL ≤ 23
netX 90 Rev.2Revised Tape Out (RTO)0x0901020dYes0x2 (PCN 220275)0x3YYWW ≥ 2229LL ≥ 24

Table 1: netX 90 revision history


Note 1:

R/W0x0000000dAddress : 0xff401298
BitsReset ValueDescriptionRemark
31 - 240x0Hilscher file header version

ROM code writes value 0x9 for netX 90 during boot sequence

23 - 160x0

Chip-specific revision

ROM code defines and writes this value during boot sequence
15 - 80x0

ROM code revision

ROM code defines and writes this value during boot sequence
7 - 00xdChip type

Chip type defined at SLM tape out

Table 2: netX 90 version register


Note 2:

  • The 4-bit manufacturer Ethernet PHY revision number, stored in the internal PHY Identifier 2 register of the integrated Ethernet PHY, can be only accessed and read out using the SMI of the xC subsystem.


Note 3:

  • For further information, please refer to PCN 220276.