netX 52

Owned by Hans-Jürgen Hilscher
Last updated: 2019-02-04 by Simon Fischer
2 min read
Use Case
  • Slave application
netX52 is designed for slave application
  • Companion Chip
netX 52 is without memory controller, it is the typical companion chip
  • PROFINET V2.3
Supports PROFINET V2.3 with FSU, DFP, FFWD
  • SPI Host
netX 51 and 52 are able to be connected to a Host over SPI
More Information about netX 52
DescriptionLink
Development boardsNXHX 52-JTAG
Sales informationhttp://www.hilscher.com/
Technical detailsOverview netX 51 / 52 and netX 90
Subpages

Description

Thanks to the internal storage capacity of more than 670 KByte, no external SDRAM is required, only a QSPI Flash for holding the protocol stack is needed, the performance is doubled in comparison to netX 50. For processing the fast I/Os, the application is provided with a second RISC CPU. It works in parallel to ARM and significantly relieves the demands made on the ARM software via short bus cycle times. Typical applications are IO-Link Master Gateways. The xPIC takes over the IO-Link data transfer, leaving the ARM completely available for processing the transmission protocol to the master.

Some Real-Time Ethernet systems use the CANopen object models or the same communication services such as EtherNet/IP and DeviceNet. This results in the task of connecting CAN as the „legacy“ network to the Real-Time Ethernet system. Up to now, that entailed using an expensive netX 100 controller, with its three communication channels. As an alternative, a dedicated CAN controller is now available. With this possibility, the netX 6 / 51 / 52 is so much more than just a Real-Time Ethernet interface chip equipped with a dual-port memory.

Block diagram