Overview netX 51 / 52 and netX 90
- Nico Mäding
- Heinz Hentsch
Owned by Nico Mäding
SoC Features | netX 51 | netX 52 | netX 90 | |
|---|---|---|---|---|
| Communication | Application | |||
| Core Processor | ||||
| ARM® Processor | ARM966E-S at 100 MHz | ARM966E-S at 100 MHz | Cortex-M4 at 100 MHz with MPU | Cortex-M4 at 100 MHz with MPU and FPU |
| Hilscher 32-bit RISC | xPIC at 100 MHz with 2x 8 KB TCM | xPIC at 100 MHz with 2x 8 KB TCM | xPIC at 100 MHz with 2x 8 KB TCM | xPIC at 100 MHz with 2x 8 KB TCM |
| Memory | ||||
SRAM | 672 KB | 672 KB | 576 KB | 64 KB |
Flash | - | - | 1024 KB | 512 KB |
Mask ROM | 64 KB | 64 KB | 128 KB | - |
| System | ||||
| DMA Controller | 3 channels | 3 channels | 4 channels | 4 channels |
| WDC (ARM / xPIC) | 1 / 1 | 1 / 1 | 1 / 1 | 1 / 1 |
| Timer (ARM / xPIC) | 2x 32-bit / 3x 32-bit | 2x 32-bit / 3x 32-bit | 3x 32-bit / 3x 32-bit | 3x 32-bit / 3x 32-bit |
| Network | ||||
| xC Subsystem*2 | 2 channels | 2 channels | 2 channels | - |
| IEEE 1588 SysTime | 2 | 2 | 2 | 1 |
| Fast Ethernet PHY | Dual-port, FX support | Dual-port, FX support | Dual-port, FX support | - |
| 100 Mbps LVDSPHY | - | - | Dual-port | - |
| Ethernet MAC | 10/100 Mbps, MII | 10/100 Mbps, MII | 10/100 Mbps, MII | |
| Peripheral | ||||
| UART (Up to 3.125 Mbaud) | 3 | 3 | 1 (shared) | 3 (Up to 6.25 Mbaud) |
SPI (Up to 50 MHz) | 1 | 1 | - | 4 |
| SQI (Up to 50 MHz) | - | - | - | 2 (Master only, with SPI mode) |
I2C (Up to 3.4 MHz) | 2 | 2 | 2 | 2 |
| CAN 2.0B (Up to 1 Mbps) | 1 | 1 | - | 2 |
| USB V1.1 (Up to 12 Mbps) | Device | Device | - | - |
IO-Link V1.1 Controller | 8 channels | 4 channels | - | 8 channels |
| MLED (PWM tuned) | - | - | 4 | 8 |
| HIF PIO / PIO / GPIO / MMIO | Up to 62 / - / 32 / 48 | Up to 62 / - / 32 / 40 | - / - / 4 / - | Up to 41 / 29 / 8 / 18 |
| Mixed Signal | ||||
| Timer (PWM, IC/OC) | 32x 32-bit | 32x 32-bit | 4x 32-bit | 8x 32-bit |
| Motion PWM Unit | - | - | - | 1 |
| ADC SAR (12-bit, 2 Msps) | - | - | 2x 5 channels, 1x 3 channels, and 1x 2 channels | |
| Quadratur Decoder | - | - | - | 2 |
| EnDat 2.2 (Master E6) | - | - | - | 2 (With RTM) |
| BiSS / SSI (Master BiSS C) | - | - | - | 2 / 2 |
| Host Interface | ||||
| Parallel (DPM) | 8/16/32-bit (Read access min. 55 ns) | 8/16/32-bit (Read access min. 55 ns) | 8/16-bit (Read access min. 55 ns) | Internal 32-bit |
| Serial (SPM) | SPI/SQI (Up to 125 MHz/33 MHz) | SPI/SQI (Up to 125 MHz/33 MHz) | 2x SPI/SQI (Up to 125 MHz/33 MHz) | - |
| MAC (PHY Mode) | MII (10/100 Mbps) | MII (10/100 Mbps) | MII (10/100 Mbps) | |
| External Memory | ||||
| SRAM / NOR / NAND / SDRAM |  / / - / (8/16/32-bit) | / / - / (8/16/32-bit) | / / - / (8/16-bit) | |
| SD/MMC / SDIO | SPI Mode / - | SPI Mode / - | SPI Mode / - | |
| SQI (XIP) | | | | |
| Security | ||||
| Crypto Core | - | - | SSL/TLS accelerator, up to RSA-4096, ECC-512, AES-256, and SHA-512 | |
| Secure Boot | - | - | Mask ROM Code, RSASSA-PSS/ECDSA | |
| Built-in support | - | - | Security levels, AHB Firewall | |
| Debug | ||||
| Debug / Trace | JTAG / ETM | JTAG / - | JTAG/SWD / 4-bit TPIU | |
| Boundary Scan | JTAG | JTAG | JTAG | |
| Analog | ||||
| DC/DC / POR / BOD | - | - | / / | |
| Thermal diode | - | - | | |
| Clock Supervisor | - | - | Xtal (RC-Osc) | |
| Electrical | ||||
| Power supply | 3.3 V, 1.5 V | 3.3 V, 1.5 V | Single 3.3 V | |
Temperature range | Ta -40°C ... +85°C | Ta -40°C ... +85°C | Ta -40°C ... +85°C/+105°C*1(Tj_max ≤ +125°C) | |
| Power consumption | 1.5 W (typ.) | 1.5 W (typ.) | ≤ 1 W | |
Package dimension | 324-Pin BGA, 19x19 mm2, 1 mm Ball Pitch | 244-Pin BGA, 15x15 mm2, 0.8 mm Ball Pitch | 144-pin BGA, 10x10 mm2, 0.8 mm Ball Pitch | |
Note 1:
- Depends on the thermal characteristics of the embedded design and the targeted mission profile (see netX 90 Design-In Guide)
Note 2:
- Channel-based real-time communication interface, which supports all popular Industrial Ethernet and Fieldbus standards
- List of software protocol stacks by netX Technologies for industrial slave or device applications