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The selection of the network interface in the AIFXv2 mode is determined by the voltage level at the configuration input pins XM0_IO1, COM_IO1 and COM_IO0 during the boot sequence of the chip. The pull-down resistor of each configuration input pin is enabled by default after reset. If the pins are left unconnected, the default mode is real-time Ethernet.
XM0_IO1 | COM_IO1 | COM_IO0 | Network Interface |
---|---|---|---|
0 | X | X | PHY0/1 Real-time Ethernet (see section 3.17.1 Twisted pair) |
1 | 0 | 0 | XM0 CANopen (see section 3.16.1 CANopen interface) |
1 | 0 | 1 | XM0 PROFIBUS (see section 3.16.4 PROFIBUS interface) |
1 | 1 | 0 | XM0 DeviceNet (see section 3.16.3 DeviceNet interface) |
1 | 1 | 1 | XM0 CC-Link (see section 3.16.2 CC-Link interface) |
Table 1: AIFXv2 mode configuration input pins
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