![(warning)](/wiki/s/560284555/6452/79599e5b5734a71e3d4346ce9f6e6d6045b79c3a/_/images/icons/emoticons/warning.png) May damage the chip or external devices! ![(error)](/wiki/s/560284555/6452/79599e5b5734a71e3d4346ce9f6e6d6045b79c3a/_/images/icons/emoticons/error.png) ![(warning)](/wiki/s/560284555/6452/79599e5b5734a71e3d4346ce9f6e6d6045b79c3a/_/images/icons/emoticons/warning.png)
The "System Reset Function" of the cortex M4 itself may be called with DRV_NVIC_SystemReset or NVIC_SystemReset. However, because the communication side might be in the process of altering a flash area, either inside or external the alteration of data is halted. After waking up, recovering procedures might be necessary and flash is altered again. This leads to possible racing conditions that will quickly use up all erase cycles available on the flash and damage the chip internal flash or the external SQI flash. |