JTAG connectors and signals

Q

How is the target reset of the JTAG connected correctly?

Connector ARM20 and FTDI

ARM20 features two reset signals: The test reset and the system reset. Both have to be connected to netx 90.

netX 90 pin	JTAG adapter ARM20
JT_TRST	TRST-
RST_IN_N	SRST-

MIPI20

The MIPI20 adapter has only one RESET- signal available.

The RESET- pin of the MIPI 20 connector is connected to the system reset (analog to JTAG ARM20 SRST-) to the netx 90 RST_IN_N pin.

Because the netX 90 JT_TRST signal resets only the JTAG debug domain, this pin remainbs unconnected in case of JTAG MIPI 20 connector.

netX 90 pin	JTAG adapter MIPI 20
RST_IN_N	RESET-

See also...

Connectors

The following table illustrates the pinning of the debug connectors.

ARM 20

MIPI 20 Narrow

Coresight 20 JTAG

Coresight 20 SWD

Example Image

Comment

NXHX 90 - JTAG (Rev 1/Rev 2)

NOT USED

NXHX 90 - JTAG (Rev 3/Rev 4) with tracing disabled

NXHX 90 - JTAG (Rev 3/Rev 4) with tracing enabled

Pinning

Pinning:

Signal	Pin	Pin	Signal
VTREF	1	2	VSUPPLY
TRST-	3	4	GND
TDI	5	6	GND
TMS	7	8	GND
TCK	9	10	GND
RTCK	11	12	GND
TDO	13	14	GND
SRST-	15	16	GND
DBGRQ	17	18	GND
DBGACK	19	20	GND

Pinning:

Signal	Pin	Pin	Signal
VREF_DEBUG	1	2	TMSC
GND	3	4	TCKC
GND	5	6	EXT
GND	7	8	BCE
GND	9	10	RESET-
GND	11	12	TRC_CLK
GND	13	14	TRC_DATA0
GND	15	16	TRC_DATA1
GND	17	18	TRC_DATA2
GND	19	20	TRC_DATA3

Pinning:

Signal	Pin	Pin	Signal
VREF_DEBUG	1	2	TMS
GND	3	4	TCK
GND	5	6	TDO
GND	7	8	TDI
GND	9	10	RESET-
GND	11	12	TRC_CLK
GND	13	14	TRC_DATA0
GND	15	16	TRC_DATA1
GND	17	18	TRC_DATA2
GND	19	20	TRC_DATA3

Pinning:

Signal	Pin	Pin	Signal
VREF_DEBUG	1	2	SWDIO
GND	3	4	SWCLK
GND	5	6	SWO
GND	7	8	N/C
GND	9	10	RESET-
GND	11	12	TRC_CLK
GND	13	14	TRC_D0
GND	15	16	TRC_D1
GND	17	18	TRC_D2
GND	19	20	TRC_D3

LA-3770 Converter ARM-20 to MIPI-10/20/34

JUMPER/Solder Bridges might have to be changed to: CORESIGHT-20-JTAG