NVIC Interrupt Priority Grouping

Q

How can I specify the interrupts priority.

A

Here is an example code using the wrapper functions in our driver on top of the original CMSIS NVIC functions. The original CMSIS function may stil be used.

NVICExample.c

#include "Examples.h"
#include "netx_drv.h"

void callbackGPIO0(void*pvContext,void*pvCustom){
  // Callback callbackGPIO1 is called after or inside callbackGPIO0 depending on the priority group
  DRV_NVIC_SetPendingIRQ(gpio_app1_IRQn);
  __BKPT();
}
void callbackGPIO1(void*pvContext,void*pvCustom){
  __BKPT();
}

int nvicexample(int argc, const char* argv[]) {
  (void) DRV_DIO_ChannelIRQAttach(DRV_DIO_ID_GPIO_0,callbackGPIO0,0);
  (void) DRV_DIO_ChannelIRQAttach(DRV_DIO_ID_GPIO_1,callbackGPIO1,0);
  // Callback callbackGPIO1 is called after callbackGPIO0 because of same priority group
  DRV_NVIC_SetPendingIRQ(gpio_app0_IRQn);
  DRV_NVIC_SetPriority(gpio_app1_IRQn,1,0);
  DRV_NVIC_SetPriority(gpio_app0_IRQn,2,0);
  // Callback callbackGPIO1 is called inside callbackGPIO0 because of different priority group
  DRV_NVIC_SetPendingIRQ(gpio_app0_IRQn);
  return 0;
}

Further informations may be found in the CMSIS and ARM documentation.

https://www.keil.com/pack/doc/CMSIS/Core/html/group__NVIC__gr.html

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/beginner-guide-on-interrupt-latency-and-interrupt-latency-of-the-arm-cortex-m-processors

https://developer.arm.com/docs/dui0553/a/cortex-m4-peripherals/nested-vectored-interrupt-controller/interrupt-set-enable-registers

See also...